VLSI Using VHDL — BTEUP Electronics 6th Semester Syllabus 2026-27

VLSI Using VHDL — What This Subject Is About

To introduce the fundamentals of VLSI design using hardware description languages, with emphasis on the design and analysis of combinational and sequential digital circuits, simulation and functional verification using VHDL, and exposure to programmable logic devices such as CPLDs and FPGAs.

Subject 6.3.2 — Elective (Specialisation), Option 2 (Practicum) • Total 100 Marks • 3 Credits • L 2 – P 3 • Choose this OR Mobile and Wireless Communication OR Power Electronic Devices • 6th Semester — Electronics Engineering • Session 2026–27

What You Will Study

Unit 1 (6 Periods)

Levels of abstraction in VLSI design, Stages in the VLSI design process: Design Entry, Simulation, Synthesis, Placement, and Routing, Implementation of NOT, AND, OR, NAND, and NOR gates using NMOS, Implementation of NOT, AND, OR, NAND, and NOR gates using CMOS, Design of simple combinational circuits using NMOS, Design of simple combinational circuits using CMOS.

The VLSI design flow — entry, simulation, synthesis, placement and routing — and building basic gates in NMOS and CMOS.

Unit 2 (6 Periods)

Types of HDL, Various modeling techniques, Fundamentals of VHDL language: module, Data types, Operators: Arithmetic operators, Logical shift operators, Relational operators, Logical operators, Syntax for Continuous assignment statements, Procedural assignment statements, Timing control, wait statement, Syntax for control statements.

The VHDL language itself: its types, operators, and the syntax for continuous and procedural assignments and control statements.

Unit 3 (6 Periods)

VHDL code for Half Adder and Full Adder, VHDL code for Half Subtractor and Full Subtractor, VHDL code for 4-to-1 Multiplexer, 1-to-4 Demultiplexer, VHDL code for 4-to-2 Encoder, 2-to-4 Decoder.

Writing VHDL for combinational circuits: adders, subtractors, multiplexers, demultiplexers, encoders and decoders.

Unit 4 (6 Periods)

VHDL code for D, JK, and T Flip-flops, VHDL code for 3-bit Shift register, VHDL code for 3-bit up counter, VHDL code for 3-bit down counter, VHDL code for 3-bit up-down counter.

Writing VHDL for sequential circuits: flip-flops, shift registers and up, down and up-down counters.

Unit 5 (4 Periods)

Introduction to PROM, PLA, and PAL – Design of combinational circuits using PROM, PAL, and PLA (up to 3 variables).

Programmable logic: PROM, PLA and PAL, and designing combinational circuits with them (up to 3 variables).

Note: no marks-distribution table is given for this subject in the official syllabus, so unit weightages are not shown.

Practical Work

• Simulation of AND and OR gate using VHDL code.
• Simulation of half adder and full adder using VHDL.
• Simulation of half subtractor and full using VHDL.
• Simulation of 4x1 MUX using VHDL.
• Simulation of 1x4 DMUX using VHDL.
• Simulation of 4 to 2 encoder using VHDL.

And more — the complete list of 11 practicals is inside the PDF.

Complete Syllabus

The full examination scheme, the complete practicals list and the reference books from the official syllabus. The unit-wise topics are in the "What You Will Study" section above.

Examination Scheme

Complete Practicals List

This is the complete list of practicals from the official syllabus.

• Simulation of AND and OR gate using VHDL code.
• Simulation of half adder and full adder using VHDL.
• Simulation of half subtractor and full using VHDL.
• Simulation of 4x1 MUX using VHDL.
• Simulation of 1x4 DMUX using VHDL.
• Simulation of 4 to 2 encoder using VHDL.
• Simulation of 2 to 4 decoder using VHDL.
• Write VHDL program for D, JK and T flip-flops.
• Write VHDL program for 3-bit shift register.
• Write VHDL program for 3-bit up counter.
• Write VHDL program for 3-bit down counter.

Reference Books

Reference books are not listed for this subject in the official syllabus.

Frequently Asked Questions

How many marks is VLSI Using VHDL worth in the 6th semester?
Elective (Specialisation): VLSI Using VHDL (6.3.2) is 100 marks. Total: 100 marks, 3 credits. The full scheme table is in the Complete Syllabus section above.

Which units carry the most weightage in VLSI Using VHDL?
No marks-distribution table is given for this subject in the official syllabus, so unit weightages are not published. The unit-wise topic list and periods are given in the Complete Syllabus section above.

What practical work is there in VLSI Using VHDL?
11 practicals/experiments, including: Simulation of AND and OR gate using VHDL code.; Simulation of half adder and full adder using VHDL.; Simulation of half subtractor and full using VHDL.. The complete list is in the Complete Syllabus section above.

Which books should I refer to for VLSI Using VHDL?
Reference books are not listed for this subject in the official syllabus.

Is VLSI Using VHDL a theory subject or a practical subject?
It is assessed as practicum — see the examination scheme in the Complete Syllabus section above.

How can I download the VLSI Using VHDL syllabus PDF?
The PDF is free to download — use the download link in the Download section below. It is prepared by KAMALDNP Academy from the official BTEUP syllabus.

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Download the VLSI Using VHDL Syllabus PDF

Download the complete VLSI Using VHDL syllabus PDF below — prepared by KAMALDNP Academy, with the full topic list, practicals and reference books.

Download the VLSI Using VHDL Syllabus PDF

Source: BTEUP 3rd Year curriculum (folder2627), approved in C.D.C. meeting held on 16.07.2026. Topic lists follow the official syllabus; short explanations are the author's own plain-English summaries, not syllabus text. Please confirm with your own polytechnic for any local changes.